PwrSoC

Want to keep informed about the latest technology and breakthroughs in the integration of active and passive power electronics.  Then I would like to invite you to join us in Hanover, Germany for PwrSoC 2023.

Registration is now open for the eighth edition of the biennial International Workshop on Power Supply on Chip (PwrSoC) which is scheduled for September 27 thru 29, 2023, to be held at Leibniz University Hannover, Hannover, Germany. Professor Bernhard Wicht (Leibniz University Hannover) is  the General Chair and local host.

        Photos: ©2022 Daniel Vogl LUH (center), Bernhard Wicht

About the Workshop

The Workshop is the leading international forum for discussing the challenges and opportunities on advancing the miniaturization and integration of power conversion and power management solutions. It will include technology, business, and supply chain topics.  The Power Sources Manufacturers Association (PSMA) and IEEE Power Electronics Society (IEEE PELS) are joint sponsors for the Workshop.

Highlights of PwrSoC 2023

The Workshop features presentation and poster sessions on advanced technologies with global academic and industry experts aimed at miniaturizing power management solutions through system architecture, circuits and topology, packaging, and passive components. Dr. Soh Yun Siah, Vice President Technology Development of GlobalFoundries, will open the event with a plenary talk. She oversees the technology roadmap execution for various applications, including high-voltage and power-analog products. The technical program includes talks by industry experts from Intel, Texas Instruments, TDK, Murata, ST, and researchers from Tyndall and Fraunhofer, as well as from academia. A Women-in-Engineering (WIE) Tea Break will be organized by female leaders in the field covered by PwrSoC. This WIE event is intended as a forum to discuss topics related to the professional development of women in engineering. A technical tour will take place in the afternoon of the final day at Baker Hughes in Celle near Hannover. Baker Hughes develops and deploys the most advanced technologies to serve energy and industrial companies looking for more efficient, reliable, and cleaner solutions. The Celle facility is the Center of Excellence for High-Temperature Electronics, including R&D and manufacturing.

Technical Sessions and Members of the Technical Program Committee

PwrSoC is organized as a single-track workshop. Each session typically has four presentations by experts from industry and academia. The Technical Program Committee of PwrSoC 2023 consists of the Technical Program Chair, Professor Bruno Allard (Université de Lyon, INSA Lyon, France), and 16 international experts. The below list gives an overview of the sessions planned over the three days of the Workshop.  The most up-to-date program can be found at Detailed Technical Program Schedule -  (pwrsocevents.com)

Session Title

Session Chairs / TPC members

Granular Power Supply

Xun Liu (Chinese Univ. Hong Kong, China)

Yasser Nour (Lotus, Denmark)

Integrated Capacitors and Energy Storage

Kousuke Miyaji (Shinshu Univ., Japan)
Dina Reda Eldamak (GUC, Egypt)

Integrated Magnetics

Cian O’Mathuna (Tyndall Institute, Ireland)

Maeve Duffy (Univ Galway, Ireland)

Marc Wurz (Univ of Hannover, Germany)

Topologies & Control

Yogesh Ramadass (TI, Santa Clara, USA)

Yan Lu (Univ. of Macau, China)

Systems & Integration

Jose Cobos (Univ. Madrid, Spain)

Francesco Carobolante (IoTissimo, USA)

System Integrated Packaging & Manufacturing

Min Chen (Innoscience, USA)

Tina Thomas (Fraunhofer IZM, Germany)

Wide Band Gap Integration

Rinkle Jain (Intel, USA)

Ke-Horng Chen (NYCU Taiwan)

Poster Session

Jens Friebe (Univ. of Kassel, Germany)

Aleksandar Prodic (Univ. of Toronto, Canada)

Poster Session

Poster abstracts can be submitted by July 31st. The traditional poster session at PwrSoC is an excellent way to showcase the latest research and engage with other experts in the field. The poster session will be held in the gallery above the atrium of the University. A Best-Poster Award for the three top-rated posters will be sponsored by IEEE PELS (TCII).  Please submit your abstract at Posters - (pwrsocevents.com)

Partnership Options

Platinum and gold sponsorship/partnership options can be selected directly when registering for PwrSoC 2023. There are various other partnership options. All details are available on the workshop’s website.  Partnership Information (pwrsocevents.com)

More Information and Registration

Please visit the workshop webpage http://pwrsocevents.com/  

I look forward to seeing you at PwrSoC 2023.

Brian Narveson

Publicity Chairman PwrSoC 2023

September 27-29, 2023
Leibniz University Hannover, Hannover, Germany

The eighth edition of the biennial International Workshop on Power Supply on Chip (PwrSoC 2023) has been scheduled for September 27 thru 29, 2023, to be held at Leibniz University Hannover, Hannover, Germany. Professor Bernhard Wicht, Leibniz University Hannover, will be the General Chair and local host. The Workshop is the leading international forum for the discussion of the challenges and opportunities in technology, business, and supply chain, intent on advancing the miniaturization and integration of power conversion and power management solutions. The Power Sources Manufacturers Association (PSMA) and IEEE Power Electronics Society (IEEE PELS) are joint sponsors for the Workshop. Founded in 1831, Leibniz University is one of the nine leading Institutes of Technology in Germany, with ~30.000 students. Named after the polymath Gottfried Wilhelm Leibniz, the university lives the spirit of Leibniz, combining global thinking and interdisciplinary research. The PwrSoC Workshop will take place in the historic main building of the university close to Hannover city center. Technical Sessions and Members of the Technical Program Committee PwrSoC is organized as a single-track workshop. Each session typically has four presentations by experts from industry and academia. The Technical Program Committee of PwrSoC 2023 consists of the Technical Program Chair, Professor Bruno Allard, Université de Lyon, INSA Lyon, France, and 16 international experts. The sessions planned for the three days of the Workshop are: Granular Power Supply    Xun Liu, Chinese Univ. Hong Kong, China; Yasser Nour, Lotus, Denmark Integrated Capacitors and Energy Storage    Kousuke Miyaji, Shinshu Univ., Japan; Dina Reda Eldamak, GUC, Egypt Integrated Magnetics    Cian O'Mathuna, Tyndall Institute, Ireland; Maeve Duffy, Univ Galway, Ireland; Marc Wurz, Univ of Hannover, Germany Topologies & Control    Yogesh Ramadass, Texas Instruments, USA; Yan Lu, Univ. of Macau, China Systems & Integration    Jose Cobos, Univ. Madrid, Spain; Francesco Carobolante, IoTissimo, USA System Integrated Packaging & Manufacturing    Min Chen, Innoscience, USA; Tina Thomas, Fraunhofer IZM, Germany Wide Band Gap Integration    Rinkle Jain, Intel, USA; Ke-Horng Chen, NYCU Taiwan Poster Session    Jens Friebe, Univ. of Kassel, Germany; Aleksandar Prodic, Univ. of Toronto, Canada Partnership Options For the first time this year, PwrSoc-23 extends the partnership opportunities to the "Gala Dinner" and the "Welcome Reception" in addition to traditional Platinum and Gold options. For more information, please visit the workshop webpage http://pwrsocevents.com/. If you are interested in becoming a PwrSoC23 Partner, please contact: Bernhard Wicht, PwrSoC23 General Chair, bernhard.wicht@ims.uni-hannover.de or Trifon Liakopoulos, PwrSoC23 Financial Chair, pwrsoc23@enachip.com For more information about previous and coming PwrSoC events, visit http://pwrsocevents.com. Provided by: Bernhard Wicht, PwrSoC 2023 General Chair Arnold Alderman, PwrSoC 2023 Publicity Chair

October 24-27, 2021
Sponsored by PSMA and IEEE PELS

he 2021 Power Supply on Chip (PwrSoC) Workshop was successfully held as a hybrid event from October 24, through October 27, at the Singh Center for Nanotechnology on the campus of the University of Pennsylvania in Philadelphia PA. Considering the difficult circumstances due to Covid-19, the workshop was still able to have a 40/60 split of in-person and on-line attendees while maintaining a safe environment for the in-person attendees. A few international in-person attendees were able to join the in-person audience which was predominantly from North America. As expected, the majority of the on-line attendees were from Europe and Asia-Pacific. The workshop continues to have near equal attendance between industry (57%) and research/academia (43%) and a strong global international interest typically favoring the host region. The global distribution of workshop attendees was North America (58%), Europe (22%) and Asia Pacific (20%).

In keeping with its history, this workshop  spotlighted the advanced technologies needed to build granular and modular power supplies and provided some compelling demonstrations of commercialized products that make a clear case that PwrSoC and PSiP technologies are becoming more prominent and mainstream.

The organizing team of world-renowned experts, innovators and pioneers of the Power Supply on Chip technology assembled the technical program for the nine technical sessions following the single-track format of past PwrSoC workshops.

• Plenary Session - Jose Cobos, University Polytechnic Madrid
• Systems and Applications - Francesco Carobolante, IoTissimo
• Topologies and Control - Bruno Allard, Université de Lyon
• Wideband Gap Integration - Brian Ma, University Texas Dallas
• Integrated Capacitors & Energy Storage - Mehdi Jatlaoui, Murata
• Integrated Magnetics - Masahiro Yamaguchi, Tohoku University Japan
• System Integrated Manufacturing and Packaging - Baoxing Chen, Analog Devices
• Granular Power - Santosh Kulkarni, Dialog Semiconductor
• Posters – Minjie Chen – Princeton University

There were a total of thirty-one lecture style presentations and fourteen poster presentations. Each of the seven technical disciplines of the workshop were represented by four lecture presentation and the plenary session added three technical presentations. The poster session covered topics from all of the technical disciplines of the workshop. As with past workshops, the balance between presenters from industry and presenters from research and academia was 50/50 indicating a strong acceptance by industry of the technology as well as continuing pursuit of further breakthroughs and innovations by research and academia. There also continues to be presentations provided by the three global regions with the global distribution of the presenters similar to that of the attendees.

The technical plenary session provided insights regarding the role of GaN, packaging architectures and integrated voltage regulators in the powering of electronics. The three plenary presenters were:

• Isik Kizilyalli,Associate Director of Technology of the Advanced Research Projects Agency – Energy (ARPA-E),
• Ravi Mahajan, Intel Fellow and Director of Pathfinding for Assembly and Packaging Technologies for 7-nonometer silicon and beyond, and
• Tim Phillips,founder and Chief Executive Officer of EmPower Semiconductor.

There were two "in-person" only events included in the program.

The 'first in-person only" was a seminar on "Social Networking for Engineers" presented by Ada Cheng, a market consultant with AdaClock and Anagenesis, and sponsored by the PSMA Industry-Education committee and IEEE PELS. This session was open to and well received by students, young professionals and even seasoned professionals who registered for the workshop and attended the session to gain insights and guidance on making meaningful connections with others. See the separate article in this issue of the UPDATE for more information on this seminar.

The second in-person only event was the spirited and interactive 'Roadmap for Power Integration Discussion" co-moderated by Francesco Carobolante of IoTissimo and Hanh-Phuc Le of University of California at San Diego. The roadmap discussions will be fed back to technical roadmap activities of IEEE and PSMA regarding power integration.

The "Trends and Opportunities" discussion originally announced as in-person only was broadcast on-line so all workshop attendees could hear the dialogue of experts from markets analysis, venture capitalist, integrated device manufacturers, small start-up component manufacturers and semiconductor fab organizations regarding the market environment to further advance Power Supply on Chip technology.

All in all, the 2021 Power Supply on Chip workshop provided two and a half days of useful and focused dialogs that will continue to drive PwrSoC and PSiP technologies forward. We look forward to the next workshop of the Power Supply on Chip workshop series. Planning is in process for the next workshop to be held as an in-person workshop in Europe. It is evident from this workshop that roadmaps are in place product releases with roots in PwrSoC and PSiP are accelerating. The momentum and interest witnessed during this workshop will lead to an exciting in-person workshop in Europe.

General Chair:
Mark Allen  mallen@seas.upenn.edu

Technical Program Co-Chairs:
Matt Wilkowski mwilkowski@enachip.com
Hanh-Phuc Le hanhphuc@ucsd.edu

For more information about previous and coming PwrSoC events, visit http://pwrsocevents.com.

The 2021 Power Supply on Chip (PwrSoC) Workshop is scheduled to be held as a hybrid event from October 24, through October 27, at the Singh Center for Nanotechnology on the campus of the University of Pennsylvania in Philadelphia PA.

For information regarding registration and workshop partner opportunities please visit http://pwrsocevents.com/registration-2/

Throughout its history, each workshop has spotlighted advanced technologies needed to build granular and modular power supplies and provided compelling demonstrations of commercialized products that make a clear case that PwrSoC and PSiP technologies are becoming more prominent and mainstream.

A team of world-renowned experts, innovators and pioneers of the Power Supply on Chip technology has assembled the technical program for the nine technical sessions following the single-track format of past power supply on chip workshops.

• Plenary Session - Jose Cobos, University Polytechnic Madrid
• Systems and Applications - Francesco Carobolante, IoTissimo
• Topologies and Control - Bruno Allard, Université de Lyon
• Wideband Gap Integration - Brian Ma, University Texas Dallas
• Integrated Capacitors & Energy Storage - Medhi Jatlaoui, Murata
• Integrated Magnetics - Masahiro Yamaguchi, Tohoku University Japan
• System Integration Manufacturing and Packaging - Baoxing Chen, Analog Devices
• Granular Power - Santosh Kulkarni, Dialog Semiconductor
• Posters - Minjie Chen, Princeton University

There will be thirty-one lecture style presentations presenters from academic, research and industry sectors for the technical areas. The ninth technical session, a poster session on the evening of Monday October 25, will encompass the seven technical disciplines of the workshop. The poster session will provide the attendees the time to interact informally and learn more about new technologies being developed from researchers and product developers.

The Plenary Session will provide insights regarding the role of GaN, packaging architectures and integrated voltage regulators in the powering of electronics. The plenary presenters are Isik Kizilyalli, Associate Director of Technology of the Advanced Research Projects Agency – Energy ( ARPA-E), Ravi Mahajan, Intel Fellow and Director of Pathfinding for Assembly and Packaging Technologies for 7-nonometer silicon and beyond, and Tim Phillips, founder and Chief Executive Officer of EmPower Semiconductor.

The technical program schedule is available at http://pwrsocevents.com/program-schedule-quickview/

The program includes three "in-person" only events.

The first "in-person only" event will be during the evening on-site check in time on Sunday October 24. There will be a seminar on "Social Networking for Engineers" presented by Ada Cheng a market consultant with AdaClock and Anagenesis and sponsored by the PSMA Industry-Education Committee in partnership with IEEE PELS. This session is open to students, young professionals and even seasoned professionals who are registered for the workshop who want to gain insights and guidance on making meaningful connections with others. Please see the separate article in this issue on the PSMA/ PELS Educational Series for more information on this session.

The second in-person only event will during the late afternoon on Monday October 25 and will be a "Trends and Opportunities" panel session moderated by Sunit Rikhi of Rockley Photonics, Inc. who retired from Intel in 2015 with more than thirty years of foundry experience. The panel includes experts from markets analysis, venture capitalist, integrated device manufacturers, small start-up component manufacturers and semiconductor fab organizations.

The third in-person only event will be a 'Roadmap for Power Integration Discussion" co-moderated by Francesco Carobolante of IoTissimo and Hanh-Phuc Le of the University of California at San Diego. The roadmap discussion will include inputs from a panel of technologists as well as from the audience. The roadmap discussions will be shared as part of  the technical roadmap activities of IEEE and PSMA on power integration.

Continuing the tradition of the enthusiasm, market relevance and success of past workshops, we are looking forward to the International Power Supply-on-Chip (PwrSoC) Workshop 2021 in Philadelphia, PA. This workshop will highlight the technology and market application developments since the most recent in-person PwrSoC workshop in Taiwan during October 2018 and to create a vision of power supply on chip activities for the next five to fifteen years.

General Chair:
Mark Allen  mallen@seas.upenn.edu

Technical Program Co-Chairs
Matt Wilkowski mwilkowski@enachip.com
Hanh-Phuc Le hanhphuc@ucsd.edu

For more information about previous and coming PwrSoC events, visit http://pwrsocevents.com.

The 7th International Workshop on Power-Supply-Chip (PwrSoC), co-sponsored by the Power Sources Manufacturers Association (PSMA) and IEEE Power Electronics Society (PELS), will be held at the Singh Center for Nanotechnology of University of Pennsylvania in Philadelphia from October 24-27, 2021, in a Hybrid format.

 The Workshop is the leading international forum for the discussion of the challenges and opportunities in technology, business, and supply chain, intent on advancing the miniaturization and integration of power conversion and power management solutions. The Workshop features presentation and dialog sessions of advanced technologies with global academic and industry experts aimed at miniaturizing power management solutions through system architecture, circuits and topology, packaging, and passive components. The value of workshop has always been recognized as an event that brings together global academic and industry experts to advance and commercialize power supply on chip technologies. The Power Sources Manufacturers Association (PSMA) and IEEE Power Electronics Society (IEEE PELS) are joint sponsors for the Workshop.

PwrSoC Events Steering Committee

Download the PwrSoC 2021 flyer

October 24-27, 2021
Sponsored by PSMA and IEEE PELS

he 2021 Power Supply on Chip (PwrSoC) Workshop is scheduled to be held in-person from October 24, through October 27, at the Singh Center for Nanotechnology on the campus of the University of Pennsylvania in Philadelphia PA.

Throughout its history, each workshop has spotlighted advanced technologies needed to build granular and modular power supplies and provided compelling demonstrations of commercialized products that make a clear case that PwrSoC and PSiP technologies are becoming more prominent and mainstream.

The technical program chairs for the 2021 International Power Supply-on-Chip (PwrSoC) Workshop are Hanh-Phuc Le of University of California at San Diego and Matt Wilkowski of EnaChip. Hanh-Phuc and Matt have both been presenters, session chairs and program chairs for past Power Supply on Chip workshops. A team of world-renowned experts, innovators and pioneers of the Power Supply on Chip technology has been assembled to chair the workshop's nine sessions.

• Plenary Session - Jose Cobos, University Polytechnic Madrid
• Systems and Applications - Francesco Carobolante, IoTissimo
• Topologies and Control - Bruno Allard, Université de Lyon
• Wideband Gap Integration - Brian Ma, University Texas Dallas
• Integrated Capacitors & Energy Storage - Medhi Jatlaoui, Murata
• Integrated Magnetics - Masahiro Yamaguchi, Tohoku University Japan
• System Integration Manufacturing and Packaging - Baoxing Chen, Analog Devices
• Granular Power - Santosh Kulkarni, Dialog Semiconductor
• Posters - Minjie Chen, Princeton University

The technical program committee is in the process of identifying a pool of respected international experts from academic, research and industry for the areas covered by each of the technical sessions. The session chairs are looking to build on the glimpses of technology developments, product developments and emerging market applications that were provided during the PwrSoC corridor webinar event this past November with the goal of publishing an agenda for the topics and presenters by early summer 2021. If interested in providing a presentation, please contact one of the session chairs or technical program co-chairs.

As with past workshops, all lecture presentations are by invitation from the respective session chairs. A call for posters is planned for early summer 2021. Registration for the 2021 Power Supply on Chip workshop is expected to open during the summer of 2021.

The 2021 November PwrSoC corridor event did provide a first look at the progressions since the last in-person workshop in Taiwan with presenters and attendees from all global regions. This virtual event was highly attended with many first-time attendees representing the growing international interest in PSiP and PwrSoC technologies and PwrSoC's technology posturing to grow and become more mainstream in the next few years.

The planning of the technical program, supporting activities as well as identifying workshop partners to contribute to its success are in process. If interested in being a workshop partner, please contact the workshop financial chair, Trifon Liakopoulos, at trifon@enachip.com

Continuing the tradition of the enthusiasm, market relevance and success of past workshops, we are looking forward to the in-person International Power Supply-on-Chip (PwrSoC) Workshop 2021 in Philadelphia, PA during the week of October 24 thru 27 2021 bringing to light the technology and market application developments since the most recent in-person PwrSoC workshop in Taiwan during October 2018.

General Chair:
Mark Allen  mallen@seas.upenn.edu

Technical Program Co-Chairs
Matt Wilkowski mwilkowski@enachip.com
Hanh-Phuc Le hanhphuc@ucsd.edu

For more information about previous and coming PwrSoC events, visit http://pwrsocevents.com.

The Power Supply on Chip corridor webinar series sponsored by the Power Sources Manufacturers Association (PSMA) and IEEE Power Electronics Society (IEEE PELS) was held during the first two weeks of November 2020. This webinar series, made possible by the financial support of PSMA, had a goal  of bridging the 2018 PwrSoC workshop and the 2021 PwrSoc Workshop that was rescheduled. due to the COVID19 impact on the ability of attendees to travel and to attend a live event. The 2021 PwrSoC Workshop is scheduled to be held in-person from October 24, through October 27, at the Singh Center for Nanotechnology on the campus of the University of Pennsylvania in Philadelphia PA.

The (PwrSoC) corridor webinar series consisted of three two-hour sessions. Each webinar session addressed technology developments since the 2018 workshop that may well be ready for commercialization by the time of the 2021 workshop. Each session focused on a different set of applications and technology advances. The sessions were held on November 5, November 10, and November 12. Each session consisted of three presentations and a panel Q&A that lasted about 30 minutes, reflecting the webinar attendees' interest in the presentations and appetite for additional information on the technologies that are being developed.

The agendas of the webinar sessions were as follows:

The growing awareness and interest of PwrSoC enabling technologies was evidenced by the large number of registrations realized for the webinar series, more than double the number of attendees at previous workshops. The virtual webinar series enabled participation by those who are interested in PwrSoC but may not have been able to travel to attend the past in-person workshops.

Mark Allen the general chair for 2021 PwrSoC workshop noted "… the technical breadth and market awareness of the presenters and the session chairs clearly identified many of the technical advances and expanding applications and opportunities since the 2018 workshop, paving the way to a noteworthy and comprehensive workshop agenda in 2021…"

International Power Supply-on-Chip (PwrSoC) Workshop 2021

Throughout its history, each workshop has spotlighted advanced technologies needed to build granular and modular power supplies and provided compelling demonstrations of commercialized products that make a clear case that PwrSoC and PSiP technologies are becoming more prominent and mainstream.

The technical program chairs for the 2021 International Power Supply-on-Chip (PwrSoC) Workshop are Hanh-Phuc Le of University of California at San Diego and Matt Wilkowski of EnaChip. Hanh-Phuc and Matt have both been presenters, session chairs and program chairs for past Power Supply on Chip workshops. A team of world-renowned experts, innovators and pioneers of the Power Supply on Chip technology has been assembled to chair the workshop's nine sessions.

The technical program chairs for the 2021 workshop are Hanh-Phuc le of University of California at San Diego and Matt Wilkowski of EnaChip. Hanh-Phuc and Matt have both been presenters, session chairs and program chairs for past Power Supply on Chip workshops. A team of world-renowned experts, innovators and pioneers of the Power Supply on Chip technology has been assembled to chair the workshop's nine sessions.

• Plenary Session - Jose Cobos, University Polytechnic Madrid
• Systems and Applications - Francesco Carobolante, IoTissimo
• Topologies and Control - Bruno Allard, Université de Lyon
• Wideband Gap Integration - Brian Ma, University Texas Dallas
• Integrated Capacitors & Energy Storage - Medhi Jatlaoui, Murata
• Integrated Magnetics - Masahiro Yamaguchi, Tohoku University Japan
• Sys Integ Manufacturing and Packaging - Baoxing Chen, Analog Devices
• Granular Power - Santosh Kulkarni, Dialog Semiconductor
• Posters - Minjie Chen, Princeton University

The planning of the technical program, supporting activities as well as identifying workshop partners to contribute to its success are in process. If interested in being a workshop partner, please contact the workshop financial chair, Trifon Liakopoulos, at the following e-mail address: trifon@enachip.com

Continuing the tradition of the enthusiasm, market relevance and success of this recent webinar series and past workshops, we are looking forward to the International Power Supply-on-Chip (PwrSoC) Workshop 2021 in Philadelphia, PA. during the week of October 24 thru 27 2021 bringing to light the technology and market application developments since the most recent in-person PwrSoC workshop in Taiwan during October 2018.

General Chair:
Mark Allen  mallen@seas.upenn.edu

Technical Program Co-Chairs
Matt Wilkowski mwilkowski@enachip.com
Hanh-Phuc Le hanhphuc@ucsd.edu

For more information about previous and coming PwrSoC events, visit http://pwrsocevents.com.

The Power Sources Manufacturers Association (PSMA) and IEEE Power Electronics Society (IEEE PELS) are sponsoring a webinar series during the first two weeks of November 2020. The webinar series is a corridor event made possible by the financial support of PSMA bridging the 2018 PwrSoC workshop and the 2021 PwrSoC Workshop rescheduled due to the COVID19 impact on the ability of attendees to travel to and attend a live event. The 2021 PwrSoC Workshop will be held October 24, through October 27, at the Singh Center for Nanotechnology on the campus of the University of Pennsylvania in Philadelphia PA

The (PwrSoC) webinar series willconsist of three (3) two hour Webinar sessions. Each webinar session will address technology developments since the 2018 workshop and may well be ready for commercialization by the 2021 workshop. Each session will address a different set of applications and technology advances. The sessions will be on Thursday November 5, Tuesday November 10 and Thursday November 12. Each session will begin at 9:00 AM CST (GMT -6).  There will be three presentations per session. Each presentation will be approximately twenty-five minutes in length. There will be a panel question and answer session for the technical presentations at the end of each webinar event. Each webinar session will remain open until the presenters answer all the questions submitted. The agendas of the webinar events are as follows:

Attendees have always recognized the PwrSoC Workshop value as an event that brings together global academic and industry experts to formally and informally discuss issues to advance and productize power-supply-on-chip technologies. Mark Allen, Chair for the 2021 Workshop and the 2020 Corridor Webinar has indicated, “… the 2020 webinar series will fill a void in the timing of the live workshop series created by the COVID-19 situation by taking advantage of experiences with virtual workshops that have become more prevalent this past year to improve interaction for virtual global events and further develop the interactive experiences of a virtual format which may become more prevalent in the future … “

Registration for the corridor webinar event is now open. Registration details are available at PwrSoC Corridor Webinar Series Registration. The webinar series will be free of charge but the number of attendees that can register will be limited; we advise you to register early.

Registered attendees for the workshop will have access to the presentations prior to the webinar series. This will allow registered attendees to submit questions in advance of the webinars. Recording of the panel Q&A will be made available to registered attendees after the webinar series is completed. This will allow registered attendees across global time zones to conveniently access the presentations and submit questions.

Throughout its history, the workshop has spotlighted advanced technologies to build granular and modular power supplies and compelling demonstrations of commercialized products that make a clear case for PwrSoC and PSiP technologies becoming more prominent and mainstream.

International Power Supply-on-Chip (PwrSoC) Workshop 2021

The technical program chairs for the 2021 workshop are Hanh-Phuc le of University of California at San Diego and Matt Wilkowski of EnaChip. Hanh-Phuc and Matt have both been presenters, session chairs and program chairs for past Power Supply on Chip workshops. A team of world-renowned experts, innovators and pioneers of the Power Supply on Chip technology has been assembled to chair the workshop’s nine sessions.

• Plenary Session - Jose Cobos, University Polytechnic Madrid
• Systems and Applications - Francesco Carobolante, IoTissimo
• Topologies and Control - Bruno Allard, Université de Lyon
• Wideband Gap Integration - Brian Ma, University Texas Dallas
• Integrated Capacitors & Energy Storage - Medhi Jatlaoui, Murata
• Integrated Magnetics - Masahiro Yamaguchi, Tohoku University Japan
• Sys Integ Manufacturing and Packaging - Baoxing Chen, Analog Devices
• Granular Power - Santosh Kulkarni, Dialog Semiconductor
• Posters - Minjie Chen, Princeton University

The planning of the technical program, supporting activities as well as identifying workshop partners to contribute to its success are in process. If interested to be a workshop partner, please contact the workshop financial chair, Trifon Liakopoulos, at the following e-mail address: trifon@enachip.com

Continuing the tradition of the enthusiasm, market relevance and success of past workshops, we are looking forward to a virtual corridor event in November 2020 bridging discussions and developments since the most recent PwrSoC workshop in Taiwan during October 2018, while progressing along the path to the 2021 PwrSoC Workshop in Philadelphia, PA.

General Chair:

Mark Allen  mallen@seas.upenn.edu

Technical Program Co-Chairs

Matt Wilkowski mwilkowski@enachip.com

Hanh-Phuc Le hanhphuc@ucsd.edu

For more information about previous and coming PwrSoC events, visit http://pwrsocevents.com.

The first PwrPACK Workshop was held on October 31 and November 1 at Arizona State University at the SkySong Synergy I Innovation was sponsored by Power Sources Manufacturers Association (PSMA), in partnership with IEEE Power Electronics Society (PELS). PwrPACK2019 was aimed at expanding the PwrSoC brand to companies and peripheral efforts typically not associated with the traditional PwrSoC focus.

Hongbin Yu, General Chair stated, "The workshop was a success with attendance exceeding our planned goal. The presenters were from the local Phoenix area with a few coming from international distances. Most importantly, the satellite PwrPACK Workshop achieved the intent to increase the awareness of the PwrSoC developments and create a lead-in to the 3-day PwrSoC Workshop that will be held at the University of Pennsylvania in 2020"

The two-half day workshop focused on two topics related to power delivery in a package:

1. Process and integration of multi-die power delivery in package
2. Power system in package (PSIP) power modules

with invited speakers from both industry and academia who addressed the challenges and opportunities in miniaturization and efficient power delivery that benefits an increasing number of application areas."

PwrPACK Attendees 2019

Jim Doyle, Technical Program Co-Chair, commented, "SkySong provided a very modern high-tech location with Workshop, restaurants, and hotel all within comfortable close proximity. With slightly over 50 attending, ASU was an outstanding host providing high-quality venue and service while keeping us within budget. Many attendees requested that future events be held at SkySong.

Hongbin Yu, General Chair

Jim Doyle Technical Program Chair

Everyone was welcomed to the Arizona State University by Bertan Bakkalpglu, ON Semiconductor Professor from School of Electrical, Computer, and Energy Engineering.

Presentations will be available to attendees shortly and available to the public in 6 months.
Go to http://pwrsocevents.com/pwrpack-workshop-at-asu/

Key Note Speakers

PwrSoC Workshop – A Perspective of PwrSoC Progress, Cian O'Mathuna, Tyndall National Institute, Ireland

Advanced Packaging Architectures for Heterogeneous Integration, Ravi Mahajan, Intel Fellow, Intel Corporation

Highlights

The Workshop speakers made it clear that integrated packaging is currently directly competitive with traditional integrated solutions when considering cost, performance, and product foot-print area."

Intel in their next generation PC and server development is pursuing both advanced packaging (2.5 D) and Traditional 3D integration tracking Moore's Law.

Some of the Participants

Alex Kalnitsky from TSMC

Jihong Ren from Facebook, Session Co-Chair

Steve Kummerl from Texas Instruments

PwrPACK 2019 Technical Program

Major SOC suppliers including TSMC provided key updates and progress focusing on a fully integrated PwrSoC solution. They used this conference as a platform to introduce major announcements related to integrated silicon capacitors and fully integrated inductors availability on power processes today (no longer science fiction).

The event also provided an opportunity for international collaboration with industry and academia discussing various inductor integration methods and packaging options. Cian O'Mathuna's keynote vision of a billion autonomous sensors clearly showed the opportunity and needs for fully integrated power solutions.

Interest and participation extended beyond traditional PC Board development. By utilizing both packaging and integration is enhancing the power/processor world and becoming more evident across the industry based on tradeoffs between performance area power, and cost (PPAC). Dialog Semiconductor provided an example sharing the work on their 100MHz PSIP PMIC with internal discrete components.

Package integration and device embedding progress is commencing to drive PSiPs to much higher power density levels. Texas Instruments provided examples of that with their MicroSiP™ mm sized devices.

View the full Technical Program at http://pwrsocevents.com/pwrpack-technical-program/

The PwrSoC workshops gather outstanding academic and industry experts to discuss the challenges and opportunities in technology, design, and manufacturing necessary for advancement of miniaturized integrated power conversion and management solutions. The Power Sources Manufacturers Association (PSMA) and IEEE Power Electronics Society (IEEE PELS) are joint workshop sponsors.

This year the excitement grew as we organized and then held the PwrSoC 2018 workshop in Asia, in one of the world's leading semiconductor manufacturing centers, Hsinchu, Taiwan.

The 2018 PwrSoC Workshop confirmed the strong advancement of the critical technologies necessary to commercialize miniaturized power management semiconductor circuits integrated with associated power passive components. The Workshop maintained its single track design to make sure attendees did not miss a single learning and sharing moment.

• Topics drew upon the established package integrated approach (power supply in a package – (PSiP)
• Leading ultimately to the low cost hybrid and fully on-chip solutions (power supply on chip – (PwrSoC).

The welcoming message to attendees was, "This year, we celebrate the 10-year workshop history with not only advanced technologies to build granular power supplies but also compelling demonstrations of commercialized products that make a clear case for PwrSoC and PSiP technologies becoming more prominent and mainstream." (See the full program at http://pwrsocevents.com/schedule/ and visit http://pwrsocevents.com/pwrsoc-2018-photos/ to see more pictures from PwrSoC2018.)

Introductory Remarks The attendees were warmly welcomed to the Workshop by Mau-Chung "Frank" Chang, President of the hosting university, National Chiao Tung University (NCTU) Hsinchu, Taiwan. He related the strong semiconductor technology history of the University. He was followed by Ke-Horng Chen, General Co-Chair from NCTU who suggested that the Antelects of Confucius may be helpful as attendees seek higher knowledge. He wished us a productive and exciting workshop.  Next, Cian O'Mathuna, from Tyndall Institute, Cork Ireland PwrSoC Workshop founder and General Co-Chair reminded us of the 10-year PwrSoC Workshop technical historical landscape.

The Plenary Session was co-chaired by Ke-Horng Chen from National Chiao Tung University, Cian O'Mathuna of Tyndall National Institute, and Seth Sanders with UC Berkeley, U.S.A. The lead-off speaker was Soh Yun Siah from GLOBALFOUNDARIES sharing results of differentiate foundry approach to wafer bonded experimental GaN2BCDMOS explaining that foundries will become differentiated to include assembly functions, followed by James Doyle from Dialog Semiconductor explaining Dialog's 8 A 0.2 mm high converter results of stage 1 (external passives) of planned 2-stage (integrated passives). Peng Zhou from Huawei presented results of on-silicon magnetic thin film inductors development results – a key step towards their granular PwrSoC progress. Finally, Chien-Fan Chen of ASE explained their Semiconductor Embedded SUBstrate (SESUB) technology for robust integrated module devices having 0.3 mm or less thickness.

Session 1 Systems and Applications was co-chaired by Jose Cobos of UPM Madrid and Francisco Carobolante, U.S.A. Speakers analyzed developing approaches that are or will result in better performing power for opportunistic applications highlighted by next generation automotive system microprocessors and solid state regulators (SSRs), hearing aids, and networking systems.

Session 2 Topologies and Control co-chaired by Arnold Knott of Danish Technical University, Denmark, and Jason Stauth of Dartmouth College, U.S.A., focused on powertrain circuits and controller design for on-chip and other power supplies targeting miniaturization or integration with loads. The speakers include Dr. Christopher Schaef of Intel, Prof. Hanh-Phuc Le of University of Colorado, Dr. Toke Anderson of Nordic Power Converters, and Prof. Alexandre Prodic of University of Toronto. The speakers presented the latest advances in system architecture, converter circuit topologies, including high-frequency, multi-phase or multi-level configurations, resonant power converters operating at high and very high frequencies, switched-capacitor circuits, and hybrid converter topologies that enable ultra-high density miniaturization etc., as well as control systems enabling efficient operation at high frequencies. Particular applications covered in the session include power deliveries and power conversions for high-performance processors, data center, telecommunication systems, and LED drivers.

Session 3 Integrated Capacitive Devices co-chaired by Mohamed Mehdi Jatlaoul of Murata France and Vincent Chou from TSMC, Taiwan with MM Jataoul introducing PM Raj of Georgia Tech explaining that integrated tantalum film power capacitors are an attractive alternative to MLCC or deep trench approaches. He was followed by Jyun-Ying Lin from TSMC, Taiwan who shares their progress with deep trench capacitor (DTC) technology achieving 1.5 µF/mm2 with Vop range of 1.2 to 4 V.  Driven by demands in IoT, Frederic Nodet of Murata (formerly IPDiA) shared their progress with tailoring deep trench capacitors for applications using multiple current injection points to reduce ELS with a roadmap of 6 µF /mm2 by 2023. Finally, Lu Ming of ILika Technologies, China introduced their 250 µAh solid state battery as an alternative narrative.

Session 4 Integrated Magnetics co-chaired by Masahiro Yamaguchi of Tohoku University, Japan, Maeve Duffy of NUI, Ireland, and Charlie Sullivan of Dartmouth College, U.S.A., with Masahiro Yamaguchi introducing the speakers. The session started with Toshio Sato of Shinshu University, Japan addressing the beyond-MHz power conversion magnetics. Resulting application example was a dc-dc converter utilizing laminated Fe-based amorphous composite sheet core embedded in an organic interposer. Noah Sturcken laid out to potential users the compact circuit models for the Ferric Library of devices manufactured by TSMC. Paul McCloskey from Tyndall National Institute, Ireland shared the design, fabrication and characterization of their laminated amorphous CoZrTaB magnetic core material in a gate drive transformer. 3D micro-fabricated air-core inductors were produced by the Technical University of Denmark and applied to a 22 MHz 8.5 Vin, 3 Vout PSiP operating at 83% efficiency. Lastly, Baoxing Chen from Analog Devices presented the optimization of core and winding for the isolated power conversion micro-transformers backed by over 2.7 billion coupler channels of experience.

Session 5 Wide-Band Gap Semiconductors and Integration co-chaired by Bernhardt Wicht from Leibniz University, Germany and Brian Ma from the University of Texas at Dallas, U.S.A. introduced Dan Kinzer of Navitas U.S.A. as the first presenter sharing their progress and success with the combined power and driver high voltage/low voltage GaN in an integrated semiconductor chip. Kenneth Shepard of Columbia University, U.S.A. detailed their face-to-face bonded CMOS/GaN chips as applied to dc-dc converters that can achieve 40 A/mm2. Jef Thoné from MinDCet, a Belgium start up, described their approach to designing in close coordinated focus of the WBG power transistor and its driver. Lastly, Kevin Chen of Hong Kong University provided some insight into their analysis of the WBG device Roff dynamic behavior.

Session 6 Systems Integration, Packaging, and Manufacturing with co-chairs by Hsiao-Ching Tuan fromTSMC, Taiwan and Lou Hutter from Lou Hutter Consulting, U.S.A., with Lou Hutter introducing, Haoyi Ye from Delta Electronics led off by covering Delta's high frequency VRM packaging approach. One of the workshop's highlights was Tim Phillips responding to the 20 to 40 processor voltage rails by introducing to the world Empower Semiconductor's first 10 A hybrid integrated regulators with fully integrated devices on the horizon. Next, S. Koduri from Texas Instruments dove deeply into the numerous packaging issues for high density integrated converters adding that "the package is an active enabler of high power density" and "with the adoption of WBG… some additional complexities arise." Ending the session, Sourabh Khandelval of Macquarie University, Sidney, delved into the Advance SPICE Modeling (ASM) of GaN devices with verified results focused on Roff transitioning loss prediction and minimization.

Session 7 Granular Power Supply was co-chaired by Miguel Rodringuez from AMD, U.S.A., and Santosh Kulkarni of Dialog Semiconductor with Pedro A. M. Bezerra from ETH Switzerland, collaborating with IBM Zurich, presented their work in highly integrated power supplies utilizing 2.5-D 14 nm CMOS. He was followed by Rinkle Jain of Intel sharing their progress in precisely powering graphic processors while coping with all their dynamics. Finally, Yan Lu from the University of Macau spoke regarding their work in switched capacitance (SC) converters, stating that the SC converters are more effective in dynamically sharing power stages for required fine grain processor voltage domains.

Poster Session was held Thursday evening. We were very fortunate to have thirty (30) outstanding posters exhibited. They are listed at  http://pwrsocevents.com/posters/

The Organizing Teams

The Workshop went successfully and smoothly thanks to our very devoted and well connected organizing team led by K.H. Chen, Cian, Hanh-Phuc, and the indispensible Ms. Tai who shepherded her local team making it a rich learning event. The Program Co-Chairs filled each session with revealing and noteworthy information thanks to their selection of valuable presentations.

Exhibits

There were three product exhibit tables. Wurth Electroniks showcased their expanding number of 28 PSiP "MagI3C Power Modules, LED Modules up to 6 A and 60 V in range. Ferric exhibited their integrated magnetic cells from TSMC for the first possible merchant granular PwrSoC applications. Dialog Semiconductor demonstrated their 100 MHz 4-phase 8A buck converter that was highlighted in their plenary presentation.

The Attendees

Workshop attendance reached 158 attendees, 50% above our expectation, with 81 from Asia, 41 from Europe, 35 from North America, and one from Australia.

The program ended with a special treat for the attendees – a tour of TMC's historical Museum and the presentation of Hsinchu Science Park. Many thanksto TSMC, Hsinchu Science Park, and thanks to Landis Inn who provided lovely accommodations for workshop attendees.

Provided by:
Prof. Cian Ó Mathúna. PwrSoC2018 General Co-Chair
and Arnold Alderman, PwrSoC2018 Organizing Committee Member

PwrSoC 2016 brought together key players involved in the value chain of the integration of both modular and granular electronic power converters for multiple applications, by accessing a broad range of leading-edge technologies. There was an excellent mix of attendees with two-thirds from Industry and one-third from Academia.

Impressive and spirited discussions took place in the Q&A sessions, where current and next generation technologies were addressed in these invited, non-public, presentations.

Complete on-die integration and integration within package were of prime interest. System performance required by current and emerging applications demand ever-greater current density, voltage regulation and optimized control, form factor reduction, high efficiency, and cost reduction.

Awesome Program

“Fast moving technology”, was the general feeling in all the sessions, showing significant advances on the integration of power semiconductors, energy storage, inductive and capacitive components, topologies and control, and manufacturing technologies.

Attendees

The 156 attendees discussed and networked about next generation Power Supplies on Chip at the ETS Ingenieros Industriales de Madrid (UPM).

The attendees represented a very good balance between the sponsors — 26 percent from PSMA and 24% from IEEE-PELS. An additional 25 percent were non-members, and 13 percent were IEEE members from societies other than PELS.

E-Poster
A program of 32 excellent E-posters were presented by industry and academia, from Europe, Asia and America, covering a broad range of technologies and innovations. There were lively discussions during the over two hour session.

Welcome Party and Banquet
PwrSoC is unique in bringing together international experts with strong background in fundamentals and basic research, technology development, IC manufacturing and system integration. They all had the opportunity to socialize and network in the impressive welcome party organized by CEI students and sponsored by Qualcomm.

Further info
Information regarding the workshop can be found at www.pwrsoc2016.org, where all past presentations and e-posters are available to the public. PwrSoC 2016 presentations will also be available in April 2017.

Provided by José A. Cobos,
General Chair PwrSoC 2016

Workshop on little power supplies a BIG success!

he 4th International Power Supply on Chip (PwrSoC) Workshop convened October 6, 7, and 8 in Boston MA. The PwrSoC Events are sponsored by PSMA Power Electronics Packaging Committee and IEEE/PELS and have been held every two years since the first workshop in Cork, Ireland in 2008. We are pleased to report that the 2014 Workshop was a splendid success with a record 190 attendees. A majority 72% of attendees were from US/Canada, 20% from Europe and 7% from Asia. It was great to see many commercial companies contributing to our Workshop with a 65/35 balance between industry and academia participants.

Hosted by NUCOE

Arnold Alderman of Anagenesis, this year’s General Chair, opened the Workshop with a welcome to the attendees and stated that, “We are fortunate to have Northeastern University College of Engineering (NUCOE) host our Workshop. Our activities will be held on multiple levels of the Curry Student Center in the heart of the university campus.” Professors Nian Sun and Brad Lehman both of NUCOE provided additional opening remarks to welcome the participants to hospitality and diverse activities of Boston and to take advantage of the enthusiasm of the university environment. The workshop opening was highlighted by a welcome from NUCOE Dean Nadine Aubry, wishing us a very creative and exciting three days at Northeastern University. We expressed our delight to have the additional support from Platinum Partner Altera Corporation, and Silver Partner Mag Layers, Inc.

Outstanding Technical Program

The Workshop success can be attributed to our outstanding Technical Program of 33 invited presentations (http://pwrsoc2014.org/presentations.html) and 32 posters (http://pwrsoc2014.org/poster.html). This year we included a plenary session appropriately chaired by Cian O’Mathuna. We heard visionary talks by Bruno Allard from Ampere-Lab, Lyon, France; Seth Sanders from UC Berkeley, and Francesco Carobolante from Qualcomm. The technical sessions, led by Matt Wilkowski, Program Chair, started with identifying strategies that address system, topology and circuit approaches to meet the requirements of both present and emerging applications. It included responding to the demand ever-greater current density, optimized control, form factor reduction, higher efficiency, while reducing cost.

Accordingly, the remainder of the workshop focused on the integration of both modular and granular commercially successful miniature power converters that include magnetic and capacitor power passive elements designed for multiple applications. Presentations on power semiconductors, device packaging, and manufacturing filled out the rest of the sessions with an eye towards on-die integration and integration within package.

The presentations and e-posters will be downloadable from a password protected section of the Power Supply on Chip Workshop website beginning in late November. After June 2015, the presentations and e-posters will be downloadable from a publically accessible section of the website.

We believe the workshop’s success was also largely derived by the incredible increasing global interest in power supply on chip development and commercialization. That interest level was validated by the boundless interactive dialogue during the Q&A portion of the technical sessions that spilled over into the breaks and the reception on Monday night.

New – E-posters

We always complement our technical sessions with a poster session that provides an opportunity for many more participants to share their ideas and work that encompasses all of the PwrSoC technical disciplines. This year we upgraded our poster session with interactive flat-panel displays. The posters session of the technical sessions allowing in-depth one-on-one dialogue between the attendees and the presenters using the synergy of e-posters as a vehicle to initiate discussion for thirty plus relevant topics over a three-hour period.

Our Tour

Additionally, Professors Nian Sun and Brad Lehman organized tours of electrical engineering laboratories acquainting attendees with the many relevant and significant research programs ongoing at Northeastern University capably and enthusiastically presented by NUCOE’s next generation power electronics engineers and scientists.

Awards and Recognitions

The PwrSoC Workshop has had strong leadership from its beginning. The PwrSoC Events Steering Committee, fully recognizing this, surprised Dr. Cian O'Mathuna with the PwrSoC Events Founder's award for all of his effort to create the PwrSoC Workshop and nurture it into a mainstream event. The Steering Committee also presented an award of appreciation to Dr. Seth Sanders for his strong leadership as General Chair of PwrSoC 2012 Workshop. The success of PwrSoC 2014 is owed to the tireless efforts of the members of our Organizing and our Technical Program Committees. These committees were represented by Altera, Ampere–Lab, Anagenesis, Analog Devices, AT&S, Dartmouth University, GLOBAL FOUNDRIES, Infineon, Lion Semiconductor, LTEC, Maxim, MIT, Northeastern University, Qualcomm, Tyndall National Institute, UC Berkeley , University Polytechnic Madrid, University Polytechnic Catalunya, , University of Toronto, and the US Army Research Laboratory.

Making Our Next Workshop Even Better

At the end of the workshop technical sessions, the organizing committees completed an assessment of the current workshop based on feedback and comments from the attendees. The assessment would form a basis for improvements for future workshops. Past assessments led to: our having more networking time at various points throughout the workshop; a Monday evening reception; interactive dialogue during the Q&A portion of the technical sessions; continuing a bi-annual agenda; holding the workshop multiple global regions; and staying with the workshop format rather than moving on to a conference format.

To Madrid Next

Then, we started planning for our next workshop. The PwrSoC Events are alternately led by IEEE/PELS and PSMA. Accordingly, the next workshop will be held in the fall of 2016, in Madrid Spain led by IEEE/PELS, with José Cobos from the Technical University of Madrid (UPM) as general chair. PSMA will be leading the PwrSoC Workshop in 2018. Location yet to be determined.

PELS Papers Opportunity

In the interim between the current workshop and the 2016 workshop, IEEE/PELS is organizing an editorial team to create an issue of the Journal of Emerging and Selected Topics in Power Electronics (JESTPE) dedicated to Power Supply on Chip focusing key papers written on the technologies enabling PwrSoC development. Although this journal is not directly associated with the PwrSoC workshop series, it complements the PwrSoC workshop series, allowing presenters and attendees the opportunity to formally publish their ideas and realizations.

We strongly believe that interest and participation in the PwrSoC workshop series will continue to grow as PwrSoC technologies are commercialized based on the ideas, interactions and networking that are cultivated by these workshops. Our thanks to both PSMA and PELS for their support in making these workshops possible and to all of the members of the steering, organizing and technical committees which is best expressed as the following quote from Cian O’Mathuna: “it was great to participate in the workshop again this year. It was an excellent event. Congratulations to everyone who made it happen. ”

Provided by Matt Wilkowski, Altera Corporation, Program Chair 
and Arnold Alderman, Anagenesis Inc., General Chair