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2019 IEEE PELS/PSMA Workshop on Packaging and Integration in Power Delivery (PwrPack)

An Exploratory Discussion Leading to PwrSoC


T he first PwrPACK Workshop was held on October 31 and November 1 at Arizona State University at the SkySong Synergy I Innovation was sponsored by Power Sources Manufacturers Association (PSMA), in partnership with IEEE Power Electronics Society (PELS). PwrPACK2019 was aimed at expanding the PwrSoC brand to companies and peripheral efforts typically not associated with the traditional PwrSoC focus.

Hongbin Yu, General Chair stated, "The workshop was a success with attendance exceeding our planned goal. The presenters were from the local Phoenix area with a few coming from international distances. Most importantly, the satellite PwrPACK Workshop achieved the intent to increase the awareness of the PwrSoC developments and create a lead-in to the 3-day PwrSoC Workshop that will be held at the University of Pennsylvania in 2020"

The two-half day workshop focused on two topics related to power delivery in a package:

  1. Process and integration of multi-die power delivery in package
  2. Power system in package (PSIP) power modules

with invited speakers from both industry and academia who addressed the challenges and opportunities in miniaturization and efficient power delivery that benefits an increasing number of application areas."


PwrPACK Attendees 2019

Jim Doyle, Technical Program Co-Chair, commented, "SkySong provided a very modern high-tech location with Workshop, restaurants, and hotel all within comfortable close proximity. With slightly over 50 attending, ASU was an outstanding host providing high-quality venue and service while keeping us within budget. Many attendees requested that future events be held at SkySong.


Hongbin Yu, General Chair
 
Jim Doyle Technical Program Chair

Everyone was welcomed to the Arizona State University by Bertan Bakkalpglu, ON Semiconductor Professor from School of Electrical, Computer, and Energy Engineering.

Presentations will be available to attendees shortly and available to the public in 6 months.
Go to http://pwrsocevents.com/pwrpack-workshop-at-asu/


Key Note Speakers


PwrSoC Workshop – A Perspective of PwrSoC Progress,
Cian O'Mathuna, Tyndall National Institute, Ireland

Advanced Packaging Architectures for Heterogeneous Integration, Ravi Mahajan, Intel Fellow, Intel Corporation
 

Highlights

The Workshop speakers made it clear that integrated packaging is currently directly competitive with traditional integrated solutions when considering cost, performance, and product foot-print area."

Intel in their next generation PC and server development is pursuing both advanced packaging (2.5 D) and Traditional 3D integration tracking Moore's Law.

Some of the Participants


Alex Kalnitsky from TSMC

Jihong Ren from Facebook,
Session Co-Chair

Steve Kummerl from Texas Instruments

PwrPACK 2019 Technical Program

Major SOC suppliers including TSMC provided key updates and progress focusing on a fully integrated PwrSoC solution. They used this conference as a platform to introduce major announcements related to integrated silicon capacitors and fully integrated inductors availability on power processes today (no longer science fiction).

The event also provided an opportunity for international collaboration with industry and academia discussing various inductor integration methods and packaging options. Cian O'Mathuna's keynote vision of a billion autonomous sensors clearly showed the opportunity and needs for fully integrated power solutions.

Interest and participation extended beyond traditional PC Board development. By utilizing both packaging and integration is enhancing the power/processor world and becoming more evident across the industry based on tradeoffs between performance area power, and cost (PPAC). Dialog Semiconductor provided an example sharing the work on their 100MHz PSIP PMIC with internal discrete components.

Package integration and device embedding progress is commencing to drive PSiPs to much higher power density levels. Texas Instruments provided examples of that with their MicroSiP™ mm sized devices.

View the full Technical Program at http://pwrsocevents.com/pwrpack-technical-program/


Sessions were followed by active discussions between IC designers, assembly experts and substrate/materials providers bringing innovative solutions to address power delivery in package challenges.


Host:


(National Science Foundation Efficient Vehicle and Sustainable Transportation)


Sponsored by:

PELS logo

PSMA logo

 

Platinum Partner:

 

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