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The Next Phase Of Power Conversion - | |||||||||||||
The potential of AlGaN/GaN devices to improve the density/efficiency trade-off depends upon a part of the same voltage rating and equivalent RDS (ON) having lower switching losses. Achieving this level of performance requires more than just low reverse leakage and low nominal resistance under static conditions. To have lower switching losses, the devices must have minimal internal capacitances so that it switches fast. The best and most accurate way to validate the performance of power semiconductor device under dynamic switching conditions is to measure its performance in a real power conversion circuit such as the boost circuit used to obtain the results shown in figure 4. This high efficiency was obtained by reducing the switching losses by high dv/dt transitions that depend upon the trends described in the last newsletter. These transitions are in fact faster than those obtained using any SiC devices to date. SiC devices may have their place in the future as well as GaN but the range of voltages over which SiC will dominate is predicted to be much narrower than the range over which GaN devices will dominate as recent product introductions over the range of 40 volt to 600 volt would prove. Parasitic capacitances, inductances and package pin outs have been designed to minimized parasitic inductance and capacitance within the EZ-GaNTM devices, in order to not impede their fast switching speeds as shown above. The EZ-GaN HEMT internally contains two devices which are connected in a cascode configuration. EZ-GaNTM is a registered trademark of Transphorm Inc.
Editor's note: :This article is an excerpt from a briefing about GaN power devices by Carl Blake. We welcome articles from our members. Please contact the Association Office (power@psma.com) if you would like to contribute an article.
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